Initial

as68hc11/code/TALK3.ASM

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+; AUTHOR: SEAN KESSLER                        DATE:04/17/1999
+; PROGRAM: TALK.ASM
+; PLATFORM:M68HC11
+; FUNCTION:TEST SCI BASED COMMUNICATIONS ON CONTROLLER
+BAUD   equ 0102Bh    ; baud register
+SCCR2  equ 0102Dh    ; main control register for SCI subsystem
+SCSR   equ 0102Eh    ; status register
+SCDR   equ 0102Fh    ; data register
+SPCR   equ 01028h
+PORTD  equ 01008h    ; io configuration
+RAM    equ 00000h    ; base of code
+EEPROM equ 0F800h    ; base of EEPROM
+STACK  equ RAM+0FFh  ; stack expands down from here
+LENGTH equ 0Bh
+  org RAM                   ; base of code
+  lds STACK                 ; initialize the stack
+START equ *
+;  bsr INITSCI               ; initialize communications on controller
+;  bsr GETACK                ; send break to host and wait for acknowledgement
+  ldab 'S'                  ; load 'S' into register B
+  bsr WRITECHAR             ; send the character
+  ldab 'E'                  ; load 'E' into register B
+  bsr WRITECHAR             ; send the character
+  ldab 'A'                  ; load 'A' into register B
+  bsr WRITECHAR             ; send the character
+  ldab 'N'                  ; load 'N' into register B
+  bsr WRITECHAR             ; send the character
+  jmp START                 ; do it forever
+READCHAR equ *              ; read character from SCDR into B register
+  ldab 00h                  ; clear out B register
+  ldaa [SCSR]               ; get status into A register
+  anda 20h                  ; is RDRF set (indicates we have char)
+  beq READCHAR              ; keep trying until RDRF is set
+  ldab [SCDR]               ; load character into B register  
+  rts                       ; return to caller
+WRITECHAR equ *             ; write character to SCDR from B register
+  ldaa [SCSR]               ; get status into A register
+  anda 80h                  ; check TDRE (transmit data register empty)
+  beq WRITECHAR             ; keep trying until SCI is ready for character
+  stab [SCDR]               ; write character from B register to SCDR
+  rts                       ; return to caller
+INITSCI equ *               ; controller initialization
+  ldx SPCR                  ; load SPSC address into x register
+  bset ix,0h,20h            ; put port D in wire or mode
+  ldaa 0A2h                 ; initialize SCI & restart BAUD rate divider
+  staa [BAUD]               ; do it
+  ldaa 0Ch                  ; enable transmit/receive
+  staa [SCCR2]              ; do it
+  rts                       ; return to caller
+GETACK equ *                ; wait for signal from user
+  ldx SCCR2                 ; load SCCR2 address into index register x
+  bset ix,00h,01h           ; set bit zero in SCCR2, send break
+  ldx PORTD                 ; load PORTD address into index register x
+clrbrk equ *                ; sync address
+  brset ix,00h,01h,clrbrk   ; wait for start bit
+  ldx SCCR2                 ; load SCCR2 address into x register
+  bclr ix,00h,01h           ; clear the break
+waitchar equ *              ; sync address
+  ldx SCSR                  ; load address of SCDR into x register
+  brclr ix,00h,20h,waitchar ; wait for a character
+  ldaa [SCDR]               ; load character into register A
+  rts                       ; return to caller
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