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\f2\fs20
{#{\footnote # Introduction}
K{\footnote K introduction;contents}
${\footnote $ Introduction}
+{\footnote + General}
{\b \fs24 Introduction to M68HC11}\par\pard
\par\li360{{\uldb Instruction Set}{\v InstructionSet}}\par\pard
\li360{{\uldb Interrupt Vectors}{\v InterruptVectors}}\par\pard
}\page
{#{\footnote # InterruptVectors}
K{\footnote K Interrupt Vector}
${\footnote $ Interrupt Vectors}
+{\footnote + General}
{\b \fs24 M68HC11 Interrupt Vectors}\par\pard
\par\li240{Clock Monitor............. FFFC,FFFD}\par\pard
\li240{COP WatchDog.............. FFFA,FFFB}\par\pard
\li240{SWI....................... FFF6,FFF7}\par\pard
\li240{Timer (IC1F).............. FFEE,FFEF}\par\pard
\li240{Timer (IC2F).............. FFEC,FFED}\par\pard
\li240{Timer (IC3F).............. FFEA,FFEB}\par\pard
\li240{Timer (OC1F).............. FFE8,FFE9}\par\pard
\li240{Timer (OC2F).............. FFE6,FFE7}\par\pard
\li240{Timer (OC3F).............. FFE4,FFE5}\par\pard
\li240{Timer (OC4F).............. FFE2,FFE3}\par\pard
\li240{Timer (OC5F).............. FFE0,FFE1}\par\pard
\li240{Timer (TOF)............... FFDE,FFDD}\par\pard
\li240{Pulse Accumulator (PAOVF). FFDC,FFDD}\par\pard
\li240{Pulse Accumulator (PAII).. FFDA,FFDB}\par\pard
\par}\page
{#{\footnote # InstructionSet}
K{\footnote K Instruction Set}
${\footnote $ Instruction Set}
+{\footnote + General}
\par{\b \fs24 Instruction Set}\par\pard
\par\li240{{\uldb aba}{\v aba}}\par\pard
\li240{{\uldb abx}{\v abx}}\par\pard
\li240{{\uldb aby}{\v aby}}\par\pard
\li240{{\uldb adca}{\v adca}}\par\pard
\li240{{\uldb adcb}{\v adcb}}\par\pard
\li240{{\uldb adda}{\v adda}}\par\pard
\li240{{\uldb addb}{\v addb}}\par\pard
\li240{{\uldb addd}{\v addd}}\par\pard
\li240{{\uldb anda}{\v anda}}\par\pard
\li240{{\uldb andb}{\v andb}}\par\pard
\li240{{\uldb asl}{\v asl}}\par\pard
\li240{{\uldb asla}{\v asla}}\par\pard
\li240{{\uldb aslb}{\v aslb}}\par\pard
\li240{{\uldb asld}{\v asld}}\par\pard
\li240{{\uldb asr}{\v asr}}\par\pard
\li240{{\uldb asra}{\v asra}}\par\pard
\li240{{\uldb asrb}{\v asrb}}\par\pard
\li240{{\uldb bcc}{\v bcc}}\par\pard
\li240{{\uldb bclr}{\v bclr}}\par\pard
\li240{{\uldb bcs}{\v bcs}}\par\pard
\li240{{\uldb beq}{\v beq}}\par\pard
\li240{{\uldb bge}{\v bge}}\par\pard
\li240{{\uldb bgt}{\v bgt}}\par\pard
\li240{{\uldb bhi}{\v bhi}}\par\pard
\li240{{\uldb bhs}{\v bhs}}\par\pard
\li240{{\uldb bita}{\v bita}}\par\pard
\li240{{\uldb bitb}{\v bitb}}\par\pard
\li240{{\uldb ble}{\v ble}}\par\pard
\li240{{\uldb blo}{\v blo}}\par\pard
\li240{{\uldb bls}{\v bls}}\par\pard
\li240{{\uldb blt}{\v blt}}\par\pard
\li240{{\uldb bmi}{\v bmi}}\par\pard
\li240{{\uldb bne}{\v bne}}\par\pard
\li240{{\uldb bpl}{\v bpl}}\par\pard
\li240{{\uldb bra}{\v bra}}\par\pard
\li240{{\uldb brclr}{\v brclr}}\par\pard
\li240{{\uldb brn}{\v brn}}\par\pard
\li240{{\uldb brset}{\v brset}}\par\pard
\li240{{\uldb bset}{\v bset}}\par\pard
\li240{{\uldb bsr}{\v bsr}}\par\pard
\li240{{\uldb bvc}{\v bvc}}\par\pard
\li240{{\uldb bvs}{\v bvs}}\par\pard
\li240{{\uldb cba}{\v cba}}\par\pard
\li240{{\uldb clc}{\v clc}}\par\pard
\li240{{\uldb cli}{\v cli}}\par\pard
\li240{{\uldb clr}{\v clr}}\par\pard
\li240{{\uldb clra}{\v clra}}\par\pard
\li240{{\uldb clrb}{\v clrb}}\par\pard
\li240{{\uldb clv}{\v clv}}\par\pard
\li240{{\uldb cmpa}{\v cmpa}}\par\pard
\li240{{\uldb cmpb}{\v cmpb}}\par\pard
\li240{{\uldb com}{\v com}}\par\pard
\li240{{\uldb coma}{\v coma}}\par\pard
\li240{{\uldb comb}{\v comb}}\par\pard
\li240{{\uldb cpd}{\v cpd}}\par\pard
\li240{{\uldb cpx}{\v cpx}}\par\pard
\li240{{\uldb cpy}{\v cpy}}\par\pard
\li240{{\uldb daa}{\v daa}}\par\pard
\li240{{\uldb dec}{\v dec}}\par\pard
\li240{{\uldb deca}{\v deca}}\par\pard
\li240{{\uldb decb}{\v decb}}\par\pard
\li240{{\uldb des}{\v des}}\par\pard
\li240{{\uldb dex}{\v dex}}\par\pard
\li240{{\uldb dey}{\v dey}}\par\pard
\li240{{\uldb eora}{\v eora}}\par\pard
\li240{{\uldb eorb}{\v eorb}}\par\pard
\li240{{\uldb fdiv}{\v fdiv}}\par\pard
\li240{{\uldb idiv}{\v idiv}}\par\pard
\li240{{\uldb inc}{\v inc}}\par\pard
\li240{{\uldb inca}{\v inca}}\par\pard
\li240{{\uldb incb}{\v incb}}\par\pard
\li240{{\uldb ins}{\v ins}}\par\pard
\li240{{\uldb inx}{\v inx}}\par\pard
\li240{{\uldb iny}{\v iny}}\par\pard
\li240{{\uldb jmp}{\v jmp}}\par\pard
\li240{{\uldb jsr}{\v jsr}}\par\pard
\li240{{\uldb ldaa}{\v ldaa}}\par\pard
\li240{{\uldb ldab}{\v ldab}}\par\pard
\li240{{\uldb ldd}{\v ldd}}\par\pard
\li240{{\uldb lds}{\v lds}}\par\pard
\li240{{\uldb ldx}{\v ldx}}\par\pard
\li240{{\uldb ldy}{\v ldy}}\par\pard
\li240{{\uldb lsl}{\v lsl}}\par\pard
\li240{{\uldb lsla}{\v lsla}}\par\pard
\li240{{\uldb lslb}{\v lslb}}\par\pard
\li240{{\uldb lsld}{\v lsld}}\par\pard
\li240{{\uldb lsr}{\v lsr}}\par\pard
\li240{{\uldb lsra}{\v lsra}}\par\pard
\li240{{\uldb lsrb}{\v lsrb}}\par\pard
\li240{{\uldb lsrd}{\v lsrd}}\par\pard
\li240{{\uldb mul}{\v mul}}\par\pard
\li240{{\uldb neg}{\v neg}}\par\pard
\li240{{\uldb nega}{\v nega}}\par\pard
\li240{{\uldb negb}{\v negb}}\par\pard
\li240{{\uldb nop}{\v nop}}\par\pard
\li240{{\uldb oraa}{\v oraa}}\par\pard
\li240{{\uldb orab}{\v orab}}\par\pard
\li240{{\uldb psha}{\v psha}}\par\pard
\li240{{\uldb pshb}{\v pshb}}\par\pard
\li240{{\uldb pshx}{\v pshx}}\par\pard
\li240{{\uldb pshy}{\v pshy}}\par\pard
\li240{{\uldb pula}{\v pula}}\par\pard
\li240{{\uldb pulb}{\v pulb}}\par\pard
\li240{{\uldb pulx}{\v pulx}}\par\pard
\li240{{\uldb puly}{\v puly}}\par\pard
\li240{{\uldb rol}{\v rol}}\par\pard
\li240{{\uldb rola}{\v rola}}\par\pard
\li240{{\uldb rolb}{\v rolb}}\par\pard
\li240{{\uldb ror}{\v ror}}\par\pard
\li240{{\uldb rora}{\v rora}}\par\pard
\li240{{\uldb rorb}{\v rorb}}\par\pard
\li240{{\uldb rti}{\v rti}}\par\pard
\li240{{\uldb rts}{\v rts}}\par\pard
\li240{{\uldb sba}{\v sba}}\par\pard
\li240{{\uldb sbca}{\v sbca}}\par\pard
\li240{{\uldb sbcb}{\v sbcb}}\par\pard
\li240{{\uldb sec}{\v sec}}\par\pard
\li240{{\uldb sei}{\v sei}}\par\pard
\li240{{\uldb sev}{\v sev}}\par\pard
\li240{{\uldb staa}{\v staa}}\par\pard
\li240{{\uldb stab}{\v stab}}\par\pard
\li240{{\uldb std}{\v std}}\par\pard
\li240{{\uldb stop}{\v stop}}\par\pard
\li240{{\uldb sts}{\v sts}}\par\pard
\li240{{\uldb stx}{\v stx}}\par\pard
\li240{{\uldb sty}{\v sty}}\par\pard
\li240{{\uldb suba}{\v suba}}\par\pard
\li240{{\uldb subb}{\v subb}}\par\pard
\li240{{\uldb subd}{\v subd}}\par\pard
\li240{{\uldb swi}{\v swi}}\par\pard
\li240{{\uldb tab}{\v tab}}\par\pard
\li240{{\uldb tap}{\v tap}}\par\pard
\li240{{\uldb tba}{\v tba}}\par\pard
\li240{{\uldb test}{\v test}}\par\pard
\li240{{\uldb tpa}{\v tpa}}\par\pard
\li240{{\uldb tst}{\v tst}}\par\pard
\li240{{\uldb tsta}{\v tsta}}\par\pard
\li240{{\uldb tstb}{\v tstb}}\par\pard
\li240{{\uldb tsx}{\v tsx}}\par\pard
\li240{{\uldb tsy}{\v tsy}}\par\pard
\li240{{\uldb txs}{\v txs}}\par\pard
\li240{{\uldb tys}{\v tys}}\par\pard
\li240{{\uldb wai}{\v wai}}\par\pard
\li240{{\uldb xgdx}{\v xgdx}}\par\pard
\li240{{\uldb xgdy}{\v xgdy}}\par\pard
\par}\page
{#{\footnote # aba}
K{\footnote K aba}
${\footnote $ aba}
+{\footnote + General}
\par{\b \fs24 aba}\par\pard
\par\li240{Add Accumulators.  A + B -> A.  (INH)}\par\pard
\par}\page
{#{\footnote # abx}
K{\footnote K abx}
${\footnote $ abx}
+{\footnote + General}
\par{\b \fs24 abx}\par\pard
\par\li240{Add B to X.  (INH)}\par\pard
\par}\page
{#{\footnote # aby}
K{\footnote K aby}
${\footnote $ aby}
+{\footnote + General}
\par{\b \fs24 aby}\par\pard
\par\li240{Add B to Y.  (INH)}\par\pard
\par}\page
{#{\footnote # adca}
K{\footnote K adca}
${\footnote $ adca}
+{\footnote + General}
\par{\b \fs24 adca}\par\pard
\par\li240{Add with carry to A. (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # adcb}
K{\footnote K adcb}
${\footnote $ adcb}
+{\footnote + General}
\par{\b \fs24 adca}\par\pard
\par\li240{Add with carry to B.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # adda}
K{\footnote K adda}
${\footnote $ adda}
+{\footnote + General}
\par{\b \fs24 adda}\par\pard
\par\li240{Add memory to A. A + M -> A.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # addb}
K{\footnote K addb}
${\footnote $ addb}
+{\footnote + General}
\par{\b \fs24 addb}\par\pard
\par\li240{Add memory to B. B + M -> B.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # addd}
K{\footnote K addd}
${\footnote $ addd}
+{\footnote + General}
\par{\b \fs24 addd}\par\pard
\par\li240{Add 16 bit to D.  D + (M : M + 1) -> D.  (IMM,DIR,EXT,INDX,INDY
)}\par\pard
\par}\page
{#{\footnote # anda}
K{\footnote K anda}
${\footnote $ anda}
+{\footnote + General}
\par{\b \fs24 anda}\par\pard
\par\li240{AND A with memory.  A & M -> A (IMM,DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # andb}
K{\footnote K andb}
${\footnote $ andb}
+{\footnote + General}
\par{\b \fs24 andb}\par\pard
\par\li240{AND B with memory.  B & M -> B (IMM,DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # asl}
K{\footnote K asl}
${\footnote $ asl}
+{\footnote + General}
\par{\b \fs24 asl}\par\pard
\par\li240{Arithmetic shift left.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # asla}
K{\footnote K asla}
${\footnote $ asla}
+{\footnote + General}
\par{\b \fs24 asla}\par\pard
\par\li240{Arithmetic shift left A.  (INH)}\par\pard
\par}\page
{#{\footnote # aslb}
K{\footnote K aslb}
${\footnote $ aslb}
+{\footnote + General}
\par{\b \fs24 aslb}\par\pard
\par\li240{Arithmetic shift left B.  (INH)}\par\pard
\par}\page
{#{\footnote # asld}
K{\footnote K asld}
${\footnote $ asld}
+{\footnote + General}
\par{\b \fs24 asld}\par\pard
\par\li240{Arithmetic shift left D.  (INH)}\par\pard
\par}\page
{#{\footnote # asr}
K{\footnote K asr}
${\footnote $ asr}
+{\footnote + General}
\par{\b \fs24 asr}\par\pard
\par\li240{Arithmetic shift right.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # asra}
K{\footnote K asra}
${\footnote $ asra}
+{\footnote + General}
\par{\b \fs24 asra}\par\pard
\par\li240{Arithmetic shift right A.  (INH)}\par\pard
\par}\page
{#{\footnote # asrb}
K{\footnote K asrb}
${\footnote $ asrb}
+{\footnote + General}
\par{\b \fs24 asrb}\par\pard
\par\li240{Arithmetic shift right B.  (INH)}\par\pard
\par}\page
{#{\footnote # bcc}
K{\footnote K bcc}
${\footnote $ bcc}
+{\footnote + General}
\par{\b \fs24 bcc}\par\pard
\par\li240{Branch if carry clear.  (REL)}\par\pard
\par}\page
{#{\footnote # bclr}
K{\footnote K bclr}
${\footnote $ bclr}
+{\footnote + General}
\par{\b \fs24 bclr}\par\pard
\par\li240{Clear bits.  M : (mm) -> M (DIR,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # bcs}
K{\footnote K bcs}
${\footnote $ bcs}
+{\footnote + General}
\par{\b \fs24 bcs}\par\pard
\par\li240{Branch if carry set.  (REL)}\par\pard
\par}\page
{#{\footnote # beq}
K{\footnote K beq}
${\footnote $ beq}
+{\footnote + General}
\par{\b \fs24 beq}\par\pard
\par\li240{Branch if equal zero.  (REL)}\par\pard
\par}\page
{#{\footnote # bge}
K{\footnote K bge}
${\footnote $ bge}
+{\footnote + General}
\par{\b \fs24 bge}\par\pard
\par\li240{Branch if greater equal zero.  (REL)}\par\pard
\par}\page
{#{\footnote # bgt}
K{\footnote K bgt}
${\footnote $ bgt}
+{\footnote + General}
\par{\b \fs24 bgt}\par\pard
\par\li240{Branch if greater than zero.  (REL)}\par\pard
\par}\page
{#{\footnote # bhi}
K{\footnote K bhi}
${\footnote $ bhi}
+{\footnote + General}
\par{\b \fs24 bhi}\par\pard
\par\li240{Branch if higher.  (REL)}\par\pard
\par}\page
{#{\footnote # bhs}
K{\footnote K bhs}
${\footnote $ bhs}
+{\footnote + General}
\par{\b \fs24 bhs}\par\pard
\par\li240{Branch if higher or same.  (REL)}\par\pard
\par}\page
{#{\footnote # bita}
K{\footnote K bita}
${\footnote $ bita}
+{\footnote + General}
\par{\b \fs24 bita}\par\pard
\par\li240{Bit test A with memory. (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # bitb}
K{\footnote K bitb}
${\footnote $ bitb}
+{\footnote + General}
\par{\b \fs24 bitb}\par\pard
\par\li240{Bit test B with memory. (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # ble}
K{\footnote K ble}
${\footnote $ ble}
+{\footnote + General}
\par{\b \fs24 ble}\par\pard
\par\li240{Branch if less than or equal to zero. (REL)}\par\pard
\par}\page
{#{\footnote # blo}
K{\footnote K blo}
${\footnote $ blo}
+{\footnote + General}
\par{\b \fs24 blo}\par\pard
\par\li240{Branch if lower. (REL)}\par\pard
\par}\page
{#{\footnote # bls}
K{\footnote K bls}
${\footnote $ bls}
+{\footnote + General}
\par{\b \fs24 bls}\par\pard
\par\li240{Branch if less or same. (REL)}\par\pard
\par}\page
{#{\footnote # blt}
K{\footnote K blt}
${\footnote $ blt}
+{\footnote + General}
\par{\b \fs24 blt}\par\pard
\par\li240{Branch if less than zero. (REL)}\par\pard
\par}\page
{#{\footnote # bmi}
K{\footnote K bmi}
${\footnote $ bmi}
+{\footnote + General}
\par{\b \fs24 bmi}\par\pard
\par\li240{Branch if minus. (REL)}\par\pard
\par}\page
{#{\footnote # bne}
K{\footnote K bne}
${\footnote $ bne}
+{\footnote + General}
\par{\b \fs24 bne}\par\pard
\par\li240{Branch if not equal zero. (REL)}\par\pard
\par}\page
{#{\footnote # bpl}
K{\footnote K bpl}
${\footnote $ bpl}
+{\footnote + General}
\par{\b \fs24 bpl}\par\pard
\par\li120{Branch if plus. (REL)}\par\pard
\par}\page
{#{\footnote # bra}
K{\footnote K bra}
${\footnote $ bra}
+{\footnote + General}
\par{\b \fs24 bra}\par\pard
\par\li240{Branch always. (REL)}\par\pard
\par}\page
{#{\footnote # brclr}
K{\footnote K brclr}
${\footnote $ brclr}
+{\footnote + General}
\par{\b \fs24 brclr}\par\pard
\par\li240{Branch if bits clear. (DIR,INDX,INDY). (dd mm rr)}\par\pard
\li4920{(ff mm rr)}\par\pard
}\page
{#{\footnote # brn}
K{\footnote K brn}
${\footnote $ brn}
+{\footnote + General}
\par{\b \fs24 brn}\par\pard
\par\li240{Branch never. (REL)}\par\pard
\par}\page
{#{\footnote # brset}
K{\footnote K brset}
${\footnote $ brset}
+{\footnote + General}
\par{\b \fs24 brset}\par\pard
\par\li240{Branch if bits set. (DIR,INDX,INDY) (dd mm rr)}\par\pard
\li4560{(ff mm rr)}\par\pard
\par}\page
{#{\footnote # bset}
K{\footnote K bset}
${\footnote $ bset}
+{\footnote + General}
\par{\b \fs24 bset}\par\pard
\par\li240{Set bits.         (DIR,INDX,INDY)   (dd mm)}\par\pard
\li4560{(ff mm)}\par\pard
\par}\page
{#{\footnote # bsr}
K{\footnote K bsr}
${\footnote $ bsr}
+{\footnote + General}
\par{\b \fs24 bsr}\par\pard
\par\li240{Branch to subroutine.  (REL)}\par\pard
\par}\page
{#{\footnote # bvc}
K{\footnote K bvc}
${\footnote $ bvc}
+{\footnote + General}
\par{\b \fs24 bvc}\par\pard
\par\li240{Branch if overflow clear.  (REL)}\par\pard
\par}\page
{#{\footnote # bvs}
K{\footnote K bvs}
${\footnote $ bvs}
+{\footnote + General}
\par{\b \fs24 bvs}\par\pard
\par\li240{Branch if overflow set.  (REL)}\par\pard
\par}\page
{#{\footnote # cba}
K{\footnote K cba}
${\footnote $ cba}
+{\footnote + General}
\par{\b \fs24 cba}\par\pard
\par\li240{Compare A to B.  (INH)}\par\pard
\par}\page
{#{\footnote # clc}
K{\footnote K clc}
${\footnote $ clc}
+{\footnote + General}
\par{\b \fs24 clc}\par\pard
\par\li240{Clear carry bit.  (INH)}\par\pard
\par}\page
{#{\footnote # cli}
K{\footnote K cli}
${\footnote $ cli}
+{\footnote + General}
\par{\b \fs24 cli}\par\pard
\par\li240{Clear interrupt mask.  (INH)}\par\pard
\par}\page
{#{\footnote # clr}
K{\footnote K clr}
${\footnote $ clr}
+{\footnote + General}
\par{\b \fs24 clr}\par\pard
\par\li240{Clear memory bytes.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # clra}
K{\footnote K clra}
${\footnote $ clra}
+{\footnote + General}
\par{\b \fs24 clra}\par\pard
\par\li240{Clear accumulator A.  (INH)}\par\pard
\par}\page
{#{\footnote # clrb}
K{\footnote K clrb}
${\footnote $ clrb}
+{\footnote + General}
\par{\b \fs24 clrb}\par\pard
\par\li240{Clear accumulator B.  (INH)}\par\pard
\par}\page
{#{\footnote # clv}
K{\footnote K clv}
${\footnote $ clv}
+{\footnote + General}
\par{\b \fs24 clv}\par\pard
\par\li240{Clear overflow flag.  (INH)}\par\pard
\par}\page
{#{\footnote # cmpa}
K{\footnote K cmpa}
${\footnote $ cmpa}
+{\footnote + General}
\par{\b \fs24 cmpa}\par\pard
\par\li240{Compare A to memory.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # cmpb}
K{\footnote K cmpb}
${\footnote $ cmpb}
+{\footnote + General}
\par{\b \fs24 cmpb}\par\pard
\par\li240{Compare B to memory.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # com}
K{\footnote K com}
${\footnote $ com}
+{\footnote + General}
\par{\b \fs24 com}\par\pard
\par\li240{Ones complement memory byte.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # coma}
K{\footnote K coma}
${\footnote $ coma}
+{\footnote + General}
\par{\b \fs24 coma}\par\pard
\par\li240{Ones complement A.  (INH)}\par\pard
\par}\page
{#{\footnote # comb}
K{\footnote K comb}
${\footnote $ comb}
+{\footnote + General}
\par{\b \fs24 comb}\par\pard
\par\li240{Ones complement B.  (INH)}\par\pard
\par}\page
{#{\footnote # cpd}
K{\footnote K cpd}
${\footnote $ cpd}
+{\footnote + General}
\par{\b \fs24 cpd}\par\pard
\par\li240{compare D to memory 16-bit.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # cpx}
K{\footnote K cpx}
${\footnote $ cpx}
+{\footnote + General}
\par{\b \fs24 cpx}\par\pard
\par\li240{compare X to memory 16-bit.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # cpy}
K{\footnote K cpy}
${\footnote $ cpy}
+{\footnote + General}
\par{\b \fs24 cpy}\par\pard
\par\li240{compare Y to memory 16-bit.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # daa}
K{\footnote K daa}
${\footnote $ daa}
+{\footnote + General}
\par{\b \fs24 daa}\par\pard
\par\li240{Decimal adjust A.  (INH)}\par\pard
\par}\page
{#{\footnote # dec}
K{\footnote K dec}
${\footnote $ dec}
+{\footnote + General}
\par{\b \fs24 dec}\par\pard
\par\li240{Decrement memory byte.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # deca}
K{\footnote K deca}
${\footnote $ deca}
+{\footnote + General}
\par{\b \fs24 deca}\par\pard
\par\li240{Decrement accumulator A.  (INH)}\par\pard
\par}\page
{#{\footnote # decb}
K{\footnote K decb}
${\footnote $ decb}
+{\footnote + General}
\par{\b \fs24 decb}\par\pard
\par\li240{Decrement accumulator B.  (INH)}\par\pard
\par}\page
{#{\footnote # des}
K{\footnote K des}
${\footnote $ des}
+{\footnote + General}
\par{\b \fs24 des}\par\pard
\par\li240{Decrement stack pointer.  (INH)}\par\pard
\par}\page
{#{\footnote # dex}
K{\footnote K dex}
${\footnote $ dex}
+{\footnote + General}
\par{\b \fs24 dex}\par\pard
\par\li240{Decrement index register X.  (INH)}\par\pard
\par}\page
{#{\footnote # dey}
K{\footnote K dey}
${\footnote $ dey}
+{\footnote + General}
\par{\b \fs24 dey}\par\pard
\par\li240{Decrement index register Y.  (INH)}\par\pard
\par}\page
{#{\footnote # eora}
K{\footnote K eora}
${\footnote $ eora}
+{\footnote + General}
\par{\b \fs24 eora}\par\pard
\par\li240{Exclusive OR A with memory.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # eorb}
K{\footnote K eorb}
${\footnote $ eorb}
+{\footnote + General}
\par{\b \fs24 eorb}\par\pard
\par\li240{Exclusive OR B with memory.  (IMM,DIR,EXT,INDX,INDY)  }\par\pard
}\page
{#{\footnote # fdiv}
K{\footnote K fdiv}
${\footnote $ fdiv}
+{\footnote + General}
\par{\b \fs24 fdiv}\par\pard
\par\li240{Fractional divide 16-bit by 16-bit .  (INH)}\par\pard
\par}\page
{#{\footnote # idiv}
K{\footnote K idiv}
${\footnote $ idiv}
+{\footnote + General}
\par{\b \fs24 idiv}\par\pard
\par\li240{Integer divide 16-bit by 16-bit .  (INH)}\par\pard
\par}\page
{#{\footnote # inc}
K{\footnote K inc}
${\footnote $ inc}
+{\footnote + General}
\par{\b \fs24 inc}\par\pard
\par\li240{Increment memory byte .  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # inca}
K{\footnote K inca}
${\footnote $ inca}
+{\footnote + General}
\par{\b \fs24 inca}\par\pard
\par\li240{Increment accumulator A.  (INH)}\par\pard
\par}\page
{#{\footnote # incb}
K{\footnote K incb}
${\footnote $ incb}
+{\footnote + General}
\par{\b \fs24 incb}\par\pard
\par\li240{Increment accumulator B.  (INH)}\par\pard
\par}\page
{#{\footnote # ins}
K{\footnote K ins}
${\footnote $ ins}
+{\footnote + General}
\par{\b \fs24 ins}\par\pard
\par\li240{Increment stack pointer.  (INH)}\par\pard
\par}\page
{#{\footnote # inx}
K{\footnote K inx}
${\footnote $ inx}
+{\footnote + General}
\par{\b \fs24 inx}\par\pard
\par\li240{Increment index register X.  (INH)}\par\pard
\par}\page
{#{\footnote # iny}
K{\footnote K iny}
${\footnote $ iny}
+{\footnote + General}
\par{\b \fs24 iny}\par\pard
\par\li240{Increment index register Y.  (INH)}\par\pard
\par}\page
{#{\footnote # jmp}
K{\footnote K jmp}
${\footnote $ jmp}
+{\footnote + General}
\par{\b \fs24 jmp}\par\pard
\par\li240{Jump.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # jsr}
K{\footnote K jsr}
${\footnote $ jsr}
+{\footnote + General}
\par{\b \fs24 jsr}\par\pard
\par\li240{Jump to subroutine.  (DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # ldaa}
K{\footnote K ldaa}
${\footnote $ ldaa}
+{\footnote + General}
\par{\b \fs24 ldaa}\par\pard
\par\li240{Load accumulator A.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # ldab}
K{\footnote K ldab}
${\footnote $ ldab}
+{\footnote + General}
\par{\b \fs24 ldab}\par\pard
\par\li240{Load accumulator B.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # ldd}
K{\footnote K ldd}
${\footnote $ ldd}
+{\footnote + General}
\par{\b \fs24 ldd}\par\pard
\par\li240{Load double accumulator D.}\par\pard
\par\li360{CC IMM   ii}\par\pard
\li360{DC DIR   dd}\par\pard
\li360{FC EXT   hh ll}\par\pard
\li360{EC INDX  ff}\par\pard
{18 EC INDY  ff}\par\pard
\par\par}\page
{#{\footnote # lds}
K{\footnote K lds}
${\footnote $ lds}
+{\footnote + General}
\par{\b \fs24 ldjs}\par\pard
\par\li240{Load stack pointer.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # ldx}
K{\footnote K ldx}
${\footnote $ ldx}
+{\footnote + General}
\par{\b \fs24 ldx}\par\pard
\par\li240{Load index register X.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # ldy}
K{\footnote K ldy}
${\footnote $ ldy}
+{\footnote + General}
\par{\b \fs24 ldy}\par\pard
\par\li240{Load index register Y.  (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # lsl}
K{\footnote K lsl}
${\footnote $ lsl}
+{\footnote + General}
\par{\b \fs24 lsl}\par\pard
\par\li240{Logical shift left.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # lsla}
K{\footnote K lsla}
${\footnote $ lsla}
+{\footnote + General}
\par{\b \fs24 lsla}\par\pard
\par\li240{Logical shift left A.  (INH)}\par\pard
\par}\page
{#{\footnote # lslb}
K{\footnote K lslb}
${\footnote $ lslb}
+{\footnote + General}
\par{\b \fs24 lslb}\par\pard
\par\li240{Logical shift left B.  (INH)}\par\pard
\par}\page
{#{\footnote # lsld}
K{\footnote K lsld}
${\footnote $ lsld}
+{\footnote + General}
\par{\b \fs24 lsld}\par\pard
\par\li240{Logical shift left D.  (INH)}\par\pard
\par}\page
{#{\footnote # lsr}
K{\footnote K lsr}
${\footnote $ lsr}
+{\footnote + General}
\par{\b \fs24 lsr}\par\pard
\par\li240{Logical shift right.  (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # lsra}
K{\footnote K lsra}
${\footnote $ lsra}
+{\footnote + General}
\par{\b \fs24 lsra}\par\pard
\par\li240{Logical shift right A.  (INH)}\par\pard
\par}\page
{#{\footnote # lsrb}
K{\footnote K lsrb}
${\footnote $ lsrb}
+{\footnote + General}
\par{\b \fs24 lsrb}\par\pard
\par\li240{Logical shift right B.  (INH)}\par\pard
\par}\page
{#{\footnote # lsrd}
K{\footnote K lsrd}
${\footnote $ lsrd}
+{\footnote + General}
\par{\b \fs24 lsrd}\par\pard
\par\li240{Logical shift right D.  (INH)}\par\pard
\par}\page
{#{\footnote # mul}
K{\footnote K mul}
${\footnote $ mul}
+{\footnote + General}
\par{\b \fs24 mul}\par\pard
\par\li240{Multiply A * B -> D (INH)}\par\pard
\par}\page
{#{\footnote # neg}
K{\footnote K neg}
${\footnote $ neg}
+{\footnote + General}
\par{\b \fs24 neg}\par\pard
\par\li240{Two's complement memory byte. (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # nega}
K{\footnote K nega}
${\footnote $ nega}
+{\footnote + General}
\par{\b \fs24 nega}\par\pard
\par\li240{Two's complement A. (INH)}\par\pard
\par}\page
{#{\footnote # negb}
K{\footnote K negb}
${\footnote $ negb}
+{\footnote + General}
\par{\b \fs24 negb}\par\pard
\par\li240{Two's complement B. (INH)}\par\pard
\par}\page
{#{\footnote # nop}
K{\footnote K nop}
${\footnote $ nop}
+{\footnote + General}
\par{\b \fs24 nop}\par\pard
\par\li240{No operation. (INH)}\par\pard
\par}\page
{#{\footnote # oraa}
K{\footnote K oraa}
${\footnote $ oraa}
+{\footnote + General}
\par{\b \fs24 oraa}\par\pard
\par\li240{Inclusive OR accumulator A. (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # orab}
K{\footnote K orab}
${\footnote $ orab}
+{\footnote + General}
\par{\b \fs24 orab}\par\pard
\par\li240{Inclusive OR accumulator B. (IMM,DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # psha}
K{\footnote K psha}
${\footnote $ psha}
+{\footnote + General}
\par{\b \fs24 psha}\par\pard
\par\li240{Push A onto stack. (INH)}\par\pard
\par}\page
{#{\footnote # pshb}
K{\footnote K pshb}
${\footnote $ pshb}
+{\footnote + General}
\par{\b \fs24 pshb}\par\pard
\par\li240{Push B onto stack. (INH)}\par\pard
\par}\page
{#{\footnote # pshx}
K{\footnote K pshx}
${\footnote $ pshx}
+{\footnote + General}
\par{\b \fs24 pshx}\par\pard
\par\li240{Push X onto stack. (INH)}\par\pard
\par}\page
{#{\footnote # pshy}
K{\footnote K pshy}
${\footnote $ pshy}
+{\footnote + General}
\par{\b \fs24 pshy}\par\pard
\par\li240{Push Y onto stack. (INH)}\par\pard
\par}\page
{#{\footnote # pula}
K{\footnote K pula}
${\footnote $ pula}
+{\footnote + General}
\par{\b \fs24 pula}\par\pard
\par\li240{Pull A from stack. (INH)}\par\pard
\par}\page
{#{\footnote # pulb}
K{\footnote K pulb}
${\footnote $ pulb}
+{\footnote + General}
\par{\b \fs24 pulb}\par\pard
\par\li240{Pull B from stack. (INH)}\par\pard
\par}\page
{#{\footnote # pulx}
K{\footnote K pulx}
${\footnote $ pulx}
+{\footnote + General}
\par{\b \fs24 pulx}\par\pard
\par\li240{Pull X from stack. (Hi byte first). (INH)}\par\pard
\par}\page
{#{\footnote # puly}
K{\footnote K puly}
${\footnote $ puly}
+{\footnote + General}
\par{\b \fs24 puly}\par\pard
\par\li240{Pull Y from stack. (Hi byte first). (INH)}\par\pard
\par}\page
{#{\footnote # rol}
K{\footnote K rol}
${\footnote $ rol}
+{\footnote + General}
\par{\b \fs24 rol}\par\pard
\par\li240{Rotate left. (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # rola}
K{\footnote K rola}
${\footnote $ rola}
+{\footnote + General}
\par{\b \fs24 rola}\par\pard
\par\li240{Rotate left A. (INH)}\par\pard
\par}\page
{#{\footnote # rolb}
K{\footnote K rolb}
${\footnote $ rolb}
+{\footnote + General}
\par{\b \fs24 rolb}\par\pard
\par\li240{Rotate left B. (INH)}\par\pard
\par}\page
{#{\footnote # ror}
K{\footnote K ror}
${\footnote $ ror}
+{\footnote + General}
\par{\b \fs24 ror}\par\pard
\par\li240{Rotate right. (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # rora}
K{\footnote K rora}
${\footnote $ rora}
+{\footnote + General}
\par{\b \fs24 rora}\par\pard
\par\li240{Rotate right A. (INH)}\par\pard
\par}\page
{#{\footnote # rorb}
K{\footnote K rorb}
${\footnote $ rorb}
+{\footnote + General}
\par{\b \fs24 rorb}\par\pard
\par\li240{Rotate right B. (INH)}\par\pard
\par}\page
{#{\footnote # rti}
K{\footnote K rti}
${\footnote $ rti}
+{\footnote + General}
\par{\b \fs24 rti}\par\pard
\par\li240{Return from interrupt. (INH)}\par\pard
\par}\page
{#{\footnote # rts}
K{\footnote K rts}
${\footnote $ rts}
+{\footnote + General}
\par{\b \fs24 rts}\par\pard
\par\li240{Return from subroutine. (INH)}\par\pard
\par}\page
{#{\footnote # sba}
K{\footnote K sba}
${\footnote $ sba}
+{\footnote + General}
\par{\b \fs24 sba}\par\pard
\par\li240{Subtract B from A -> A. (INH)}\par\pard
\par}\page
{#{\footnote # sbca}
K{\footnote K sbca}
${\footnote $ sbca}
+{\footnote + General}
\par{\b \fs24 sbca}\par\pard
\par\li240{Subtract with carry from A -> A. (IMM,DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # sbcb}
K{\footnote K sbcb}
${\footnote $ sbcb}
+{\footnote + General}
\par{\b \fs24 sbcb}\par\pard
\par\li240{Subtract with carry from B -> B. (IMM,DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # sec}
K{\footnote K sec}
${\footnote $ sec}
+{\footnote + General}
\par{\b \fs24 sec}\par\pard
\par\li240{Set carry. (INH)}\par\pard
\par}\page
{#{\footnote # sei}
K{\footnote K sei}
${\footnote $ sei}
+{\footnote + General}
\par{\b \fs24 sei}\par\pard
\par\li240{Set interrupt mask. (INH)}\par\pard
\par}\page
{#{\footnote # sev}
K{\footnote K sev}
${\footnote $ sev}
+{\footnote + General}
\par{\b \fs24 sev}\par\pard
\par\li240{Set overflow flag. (INH)}\par\pard
\par}\page
{#{\footnote # staa}
K{\footnote K staa}
${\footnote $ staa}
+{\footnote + General}
\par{\b \fs24 staa}\par\pard
\par\li240{Store accumulator A -> M. (DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # stab}
K{\footnote K stab}
${\footnote $ stab}
+{\footnote + General}
\par{\b \fs24 stab}\par\pard
\par\li240{Store accumulator B -> M. (DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # std}
K{\footnote K std}
${\footnote $ std}
+{\footnote + General}
\par{\b \fs24 std}\par\pard
\par\li240{Store accumulator D -> M  (A -> M : B -> M + 1).}\par\pard
\par\li360{DD DIR  dd}\par\pard
\li360{FD EXT  hh ll}\par\pard
\li360{ED INDX ff}\par\pard
{18 ED INDY ff'  }\par\pard
}\page
{#{\footnote # stop}
K{\footnote K stop}
${\footnote $ stop}
+{\footnote + General}
\par{\b \fs24 stop}\par\pard
\par\li240{Stop internal clocks. (DIR,EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # sts}
K{\footnote K sts}
${\footnote $ sts}
+{\footnote + General}
\par{\b \fs24 sts}\par\pard
\par\li240{Store stack pointer SP -> M : M + 1. (DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # stx}
K{\footnote K stx}
${\footnote $ stx}
+{\footnote + General}
\par{\b \fs24 stx}\par\pard
\par\li240{Store index register X -> M : M +  1. (DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # sty}
K{\footnote K sty}
${\footnote $ sty}
+{\footnote + General}
\par{\b \fs24 sty}\par\pard
\par\li240{Store index register Y -> M : M +  1. (DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # suba}
K{\footnote K suba}
${\footnote $ suba}
+{\footnote + General}
\par{\b \fs24 suba}\par\pard
\par\li240{Subtract memory from A.  A - M -> A. (IMM,DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # subb}
K{\footnote K subb}
${\footnote $ subb}
+{\footnote + General}
\par{\b \fs24 subb}\par\pard
\par\li240{Subtract memory from B.  B - M -> B. (IMM,DIR,EXT,INDX,INDY)
}\par\pard
\par}\page
{#{\footnote # subd}
K{\footnote K subd}
${\footnote $ subd}
+{\footnote + General}
\par{\b \fs24 subd}\par\pard
\par\li240{Subtract memory from D.  D - M : M + 1 -> D. (IMM,DIR,EXT,INDX,
INDY)}\par\pard
\par}\page
{#{\footnote # swi}
K{\footnote K swi}
${\footnote $ swi}
+{\footnote + General}
\par{\b \fs24 swi}\par\pard
\par\li240{Software interrupt. (INH)}\par\pard
\par}\page
{#{\footnote # tab}
K{\footnote K tab}
${\footnote $ tab}
+{\footnote + General}
\par{\b \fs24 tab}\par\pard
\par\li240{Transfer A to B. (INH)}\par\pard
\par}\page
{#{\footnote # tap}
K{\footnote K tap}
${\footnote $ tap}
+{\footnote + General}
\par{\b \fs24 tap}\par\pard
\par\li240{Transfer A to CC (Control Register). (INH)}\par\pard
\par}\page
{#{\footnote # tba}
K{\footnote K tba}
${\footnote $ tba}
+{\footnote + General}
\par{\b \fs24 tba}\par\pard
\par\li240{Transfer B to A. (INH)}\par\pard
\par}\page
{#{\footnote # test}
K{\footnote K test}
${\footnote $ test}
+{\footnote + General}
\par{\b \fs24 test}\par\pard
\par\li240{TEST (Only in test modes). (INH)}\par\pard
\par}\page
{#{\footnote # tpa}
K{\footnote K tpa}
${\footnote $ tpa}
+{\footnote + General}
\par{\b \fs24 tpa}\par\pard
\par\li240{Transfer CC (Control Register) to A. (INH)}\par\pard
\par}\page
{#{\footnote # tst}
K{\footnote K tst}
${\footnote $ tst}
+{\footnote + General}
\par{\b \fs24 tst}\par\pard
\par\li240{Test for zero or minus. (EXT,INDX,INDY)}\par\pard
\par}\page
{#{\footnote # tsta}
K{\footnote K tsta}
${\footnote $ tsta}
+{\footnote + General}
\par{\b \fs24 tsta}\par\pard
\par\li240{Test A for zero or minus. (INH)}\par\pard
\par}\page
{#{\footnote # tstb}
K{\footnote K tstb}
${\footnote $ tstb}
+{\footnote + General}
\par{\b \fs24 tstb}\par\pard
\par\li240{Test B for zero or minus. (INH)}\par\pard
\par}\page
{#{\footnote # tsx}
K{\footnote K tsx}
${\footnote $ tsx}
+{\footnote + General}
\par{\b \fs24 tsx}\par\pard
\par\li240{Transfer stack pointer to X. (INH)}\par\pard
\par}\page
{#{\footnote # tsy}
K{\footnote K tsy}
${\footnote $ tsy}
+{\footnote + General}
\par{\b \fs24 tsy}\par\pard
\par\li240{Transfer stack pointer to Y. (INH)}\par\pard
\par}\page
{#{\footnote # txs}
K{\footnote K txs}
${\footnote $ txs}
+{\footnote + General}
\par{\b \fs24 txs}\par\pard
\par\li240{Transfer X to stack pointer. (INH)}\par\pard
\par}\page
{#{\footnote # tys}
K{\footnote K tys}
${\footnote $ tys}
+{\footnote + General}
\par{\b \fs24 tys}\par\pard
\par\li240{Transfer Y to stack pointer. (INH)}\par\pard
\par}\page
{#{\footnote # wai}
K{\footnote K wai}
${\footnote $ wai}
+{\footnote + General}
\par{\b \fs24 wai}\par\pard
\par\li240{Wait for interrupt.  Stack the registers and wait. (INH)
}\par\pard
\par}\page
{#{\footnote # xgdx}
K{\footnote K xgdx}
${\footnote $ xgdx}
+{\footnote + General}
\par{\b \fs24 xgdx}\par\pard
\par\li240{Exchange D with X. (INH)}\par\pard
\par}\page
{#{\footnote # xgdy}
K{\footnote K xgdy}
${\footnote $ xgdy}
+{\footnote + General}
\par{\b \fs24 xgdy}\par\pard
\par\li240{Exchange D with Y. (INH)}\par\pard
\par}\page
}